2022南京校招_EDA数字平台验证工程师 Digital Platform Validation Engineer
（Digital Platform Validation Engineer）
Platform Validation Engineer is responsible for validating the industry leading SOC implementation tools and flow solution, like “IC Compiler II”, “Design Complier”, Formality and next generation Digital platform “Fusion Complier” etc.
· Understand Customer request, Base on Digital design flow to verify new features, Include new features under advanced node, 5nm and 3nm etc.
· Validate Synopsys Frontend/Backend flow, keep to trace Frontend/Backend flow QOR/Performance.
· Understand customer usage, propose new request, to enhance flow solution.
· Design and develop test programs in Perl, TCL, Python, or C/C++, including test tools and automated test suites.
· MS in EE, Microelectronics or relevant with three years’ experience（欢迎2021应届毕业生）
· Be proficient in ASIC design flow. Include Floorplan, Synthesis, P&R, STA, etc. Expected to identify classical solutions to problems under little review and guidance
· Team-worker and great learner, Keep passion and interest to advanced technology and design flow methodology!
· Must have strong communication and interpersonal skills
· Must have good verbal and written communication skills for both Chinese and English
· Knowledge and experience in one or more of the following CS fields is a strong plus:
Programming language (C/C++, Shell, TCL, Perl, Python etc.)
· Unix/Linux operating system