ASIC Design Verification Engineer ll
89800 USD - 136000 USD
Who You'll Work With
Acacia, now part of Cisco, provides innovative silicon-based high speed optical interconnect products to accelerate network scalability through advancements in performance, capacity, and cost. Our DSP ASICs, silicon photonic PICs and coherent modules empower cloud and service providers to meet the fast-growing demand for data. We have assembled a team of cross-functional experts capable of solving the challenges of next generation optical interconnects, resulting in industry-leading, award-winning products. Come join us at Cisco, named the #1 world's best workplaces, and do purposeful work that makes a global impact and gives back to a company culture that empowers an inclusive future for all.
What You'll Do
The ASIC Design Verification Engineer will be a member of a team working on next generation 100G-1T coherent optical communications products. This role is focused on verifying highly-complex ASICs that are used in these next-generation telecom systems. The engineer in this role uses sophisticated verification techniques to complete advanced individual contributions to the projects. There are opportunities to develop process improvements for the team and to coordinate with other engineers within the engineering community to add value to the ASIC projects.
This engineer must be a fast-learning, self-motivated effective person who is able to operate in a fast-paced, dynamic and highly technical environment. A successful candidate will be energetic, collaborative and passionate about learning how to deliver the most advanced high speed optical products in the world. Knowledge of object-oriented verification methodologies is required.
* Develop detailed and comprehensive test plans
* Develop verification test benches
* Timely execution of test plans
* Assist with chip level design tradeoffs by working with design engineers
* Participate in review of design verification coding and coverage metrics
* Participate and assist in FPGA emulation efforts
* Work collaboratively with team to develop & incorporate latest technologies & processes
Who you are
* Experience/knowledge with the latest ASIC verification methodologies, tools and scripting/programming languages
* Knowledge of SystemVerilog/UVM, SystemC
* Knowledge of C and/or C++
* Proven track record of productivity
* Self-motivation and the ability to learn new skills & knowledge effectively
* Knowledge of DSP algorithms and modulation techniques such as QAM is a plus
* Lab silicon validation experience is a plus
* Knowledge of Formal Verification methodologies and tools such as Jasper a plus.
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All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability or veteran status.
Message to applicants applying to work in the U.S.: When available, the salary range posted for this position reflects the projected hiring range for new salaries in the U.S. locations. For non-sales roles, the hiring ranges reflect base salary and do not include bonuses, equity, or benefits. Hiring ranges for sales positions include base and incentive target, and do not include equity or benefits. Individual pay is determined by the candidate's hiring location and additional factors, including but not limited to skillset, experience, and relevant education, certification, or training. Applicants may not be eligible for the fill salary range based on their U.S. hiring location. The recruiter can share more details about the compensation for the role in the location during the hiring process.