Intern, NPL Research Scientist

What You’ll Learn

• Project: Based on RISC-V technology, our target is to design highly efficient and flexible tightly-coupled accelerator architecture with programmable cores. Major target systems are data-center, supercomputer, and autonomous vehicles.
• Skills You’ll Learn
  • Knowledge of SSD firmware and embedded systems
  • Understanding of SoC / Computer architecture
  • Understanding of AI basics or HPC applications
  • Understanding of processor architecture
  • Language skllls – C/C++, Python, Verilog, etc.

What You’ll Do

• Will be involved in one or a few sub-tasks about accelerator design, RISC-V based core architecture design, and developing related simulators
• Most work will be related to develop the models and simulators in order to do experiments on architectural ideation
• Will also have the chance to contribute to the architecture ideas and methodology with own suggestions, while doing analysis or experiments.
• Design several simulators (C or Python) with different levels
• Design or verify models and RTL-like code.
• Run some of simulations and analysis
• Investigate other works in papers for specific items
• Complete other responsibilities as assigned.

Location: Hybrid, working onsite at our San Jose, CA headquarters 3 days per week, with the flexibility to work remotely the remainder of your time 

What You Bring

• Currently pursuing Bachelor’s, Master’s, or Ph.D. with more than 2 years of relevant industry experience
• Knowledge of Digital IP development or Processor/Accelerator design
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.